1. Field
The present invention relates to a composition, a laminate, a method of manufacturing a laminate, a transistor, and a method of manufacturing a transistor.
2. Description of Related Art
In the related art, a laminate of a conductive layer and an insulator layer has been used in various electronic circuits.
The laminate having such a laminated structure is used, for example, to achieve the miniaturization and high integration of electronic circuits. Specifically, this laminate is used for a printed circuit board, a condenser, a transistor, and the like, each having a multilayer wiring structure.
When forming the above laminate, wirings (conductive layers) to be laminated are insulated from each other by an insulator layer. As the insulator layer, any of an inorganic insulator and an organic insulator may be used (for example, refer to U.S. Pat. Nos. 5,946,551 and 6,232,157). Among these, the laminate using an organic insulator is advantageous, compared to a laminate using a conventional insulator layer using SiO2 as a formation material, in that an insulator layer can be formed in a liquid phase and in that a laminated structure can be formed at a lower temperature without requiring a vacuum process.
In the laminate in which an organic insulator is used in an insulator layer, there is proposed a technology of patterning an insulator layer through a photoresist-free simple method by the combination of polyvinyl phenol (PVP) and an epoxy group-containing compound with a photopolymerization initiator (for example, refer to Japanese Unexamined Patent Application, First Publication No. 2006-28497).